Location: Indian Semiconductor Manufacturing Corporation (ISMC), Gorakhpur
Date: 16 January 1973 — 09:20 Hours
---
The clean room had a particular quality of silence.
Not the absence of sound — there was sound, the constant low hum of HEPA filtration systems processing 10,000 cubic feet of air per minute through filters that caught particles down to 0.3 microns, the rhythmic pulse of pressure differentials maintaining positive airflow that kept contamination from entering, the soft chanical breathing of the lithography steppers cycling through their exposure sequences — but the kind of silence that ca from a space where every surface was designed not to shed particles, where every movent was deliberate, and where the air itself was cleaner than an operating theater.
Karan stood in the gowning room, pulling on the white cleanroom suit with practiced efficiency. The ritual was familiar now — booties over shoes, suit zipped from ankle to neck, hood covering hair completely, face mask, latex gloves, and finally the slight overpressure sensation as he stepped through the air shower that blasted him from all directions for fifteen seconds to remove any remaining particles before the final door opened into the fabrication area.
Aditya was behind him, moving through the sa sequence with less ease. He had been here before but not often enough for it to beco automatic.
"Still feels like preparing for surgery," Aditya muttered through the mask.
"It is surgery," Karan said. "Except the patient is a silicon wafer and the operation happens at the scale where a human hair would look like a fallen tree."
The final door opened. They stepped into the clean room proper.
The ISMC fabrication facility occupied 15,000 square feet of the Gorakhpur industrial complex — not large by international standards, but ticulously designed. The space was divided into zones by process type: lithography, diffusion, ion implantation, etching, tallization, and testing. Each zone had its own particulate specification — Class 100 in the lithography area ant no more than 100 particles of 0.5 microns or larger per cubic foot of air, Class 1000 in the diffusion area, Class 10000 in the older sections still running the 5-micron process from 1971.
The yellow lighting gave everything a strange quality — not natural daylight but carefully controlled illumination at wavelengths that wouldn't expose the photoresist-coated wafers prematurely. Human eyes adapted to it within minutes, but it remained alien enough to remind you this was not a normal industrial space.
Sixty-eight people worked the facility across three shifts. Right now, the morning shift: twenty-four engineers, eighteen technicians, eight process controllers, six equipnt maintenance specialists, four quality inspectors, and three shift supervisors moving between stations with the choreographed precision of people who had learned that careless movent near a wafer boat could cost six hours of work.
Karan saw Lev Abrahamov first.
He was at the electrical test station, hunched over a probe station where a partially-processed wafer sat under a microscope. Lev's hands moved the micromanipulators with the fine control of soone who had done this thousands of tis — positioning tungsten probe needles onto contact pads barely visible to the naked eye, reading the electrical characteristics, making notes on the asurent sheet beside him.
Beside him stood Rajesh Kulkarni, one of the test engineers — twenty-eight years old, IIT Bombay graduate, six months at ISMC and learning the precision asurent work from Lev with the focused intensity of soone who understood that electrical testing was where process problems revealed themselves.
Lev looked up when Karan approached, eyes visible above the mask showing neither surprise nor particular welco — just the acknowledgnt that the person funding this operation had arrived.
"Morning," Lev said. His accent was still present after eighteen months in India — Hebrew inflections on English words, the slight flattening of vowels. "We are testing the 4-micron batch from last week. Yields are improving."
"How much now?" Karan asked.
"Sixty-two percent of die are functional," Lev said. He gestured at the wafer. "Six months ago we were at thirty-eight percent. The contamination control improvents and the diffusion furnace recalibration are working."
---
Yield — the percentage of functional chips produced from a silicon wafer — is the economic heartbeat of semiconductor manufacturing. A 4-inch diater silicon wafer can hold roughly 200 to 300 individual chip die, depending on the chip size. Each wafer goes through 100 to 200 processing steps over 4 to 6 weeks: photolithography to pattern the circuits, ion implantation to introduce dopants that change silicon's electrical properties, diffusion to spread those dopants precisely, etching to remove unwanted material, tallization to add the aluminum interconnects between transistors, and finally testing to identify which die work and which don't.
At 62% yield, a wafer with 250 die produces 155 functional chips. At 38% yield, the sa wafer produces only 95. The difference is revenue, return on investnt, and whether the process is comrcially viable or still experintal. Defense applications can tolerate 30-40% yields because the volus are small and the price per chip is less relevant than capability. Civilian applications need 60% yields to compete economically with imported chips.*
---
"Sixty-two percent is comrcially viable," Karan said. "For 4-micron, that number makes civilian production possible, right?."
"Yes," Lev said. "Which is why we need to discuss what happens next in Planning."
He set down the probe carefully, stepped back from the station, and looked at Karan directly.
"Sato and Tanaka want to talk to you. So do Rash and the rest of the engineering team. Everyone has been waiting since you confird the visit."
"Where?" Karan asked.
"Conference room. They are there now."
-
The conference room was adjacent to the clean room — still in the controlled environnt but outside the strictest clean zones, which ant they could remove the masks and actually see each other's faces. It was a larger space than before: a table that seated sixteen, a whiteboard covered in process flow diagrams and wavelength calculations, and a wall of printouts showing wafer maps with colored circles marking functional and defective die.
Fourteen people were already seated when Karan and Aditya entered.
Sato Hiroshi sat at one end of the table. He was a compact man in his early forties, with the particular stillness of soone whose work required micron-level precision and who had trained his body not to introduce vibration. His hair was going gray at the temples. His hands, when he gestured, moved with economical purpose.
Beside him, Tanaka Kenji — younger by five years, broader in the shoulders, with the stained fingers of soone who worked directly with photoresist chemicals and did not entirely trust gloves for the tactile feedback they blocked. He had a notebook open in front of him, pages filled with chemical formulas and molecular structure diagrams.
Lev took a seat across from them, Rajesh Kulkarni sitting beside him.
The Indians occupied the rest of the table.
Dr. Rash Chandra was the senior-most — forty-three years old, gray beginning to overtake black in his hair, sixteen years of experience split between Texas Instrunts in Dallas and now ISMC. He had returned to India in late 1971 after Karan had made an offer that was less about salary — though the salary was competitive — and more about the offer to build sothing that didn't exist yet. At Texas Instrunts he had been a senior process engineer working on established production lines. At ISMC he was the Chief Process Officer designing the production lines themselves.
Beside him, Dr. Suresh Iyer — thirty-eight, returned from Fairchild Semiconductor in 1972, specialist in ion implantation and diffusion processes. He had spent seven years in California mastering the precise control of dopant introduction into silicon before deciding that building India's semiconductor industry mattered more than incrental improvents to soone else's production line.
Next to Iyer, Mohan Krishnan — thirty-five, returned from Motorola, expert in tallization and interconnect technology. He had been part of the team that developed improved aluminum deposition processes and brought that expertise back to ISMC.
The younger engineers filled the remaining seats.
Vikram Malhotra, twenty-six, IIT Kanpur, top of his class in electrical engineering, eight months at ISMC and visibly hungry to prove that India could do this work as well as anyone. He had the intensity of soone who had grown up being told Indian technology was a generation behind and had taken that as a personal challenge.
Beside him, Arvind Desai, twenty-five, IIT Bombay, specialized in circuit design and device physics, seven months at ISMC, already contributing to the Shergill processor architecture designs.
Ravi Shankar, twenty-seven, IIT Madras, lithography and process control specialist, had been with ISMC since the beginning in 1971 and knew the equipnt intimately.
Kumar Pillai, twenty-four, IIT Delhi, the youngest of the senior engineers, specialized in photoresist processing and chemical engineering aspects of semiconductor manufacturing.
Prakash Reddy, twenty-nine, regional engineering college graduate who had proven himself exceptional despite not having an IIT pedigree, now running the diffusion furnace operations with precision that rivaled anyone's.
Akhil Verma, twenty-six, IIT Kharagpur, working on yield analysis and statistical process control, the man who turned process data into actionable improvents.
Deepak Narayan, twenty-eight, returned from Intel after three years, brought back cutting-edge knowledge of process integration and was now ISMC's integration specialist ensuring all the process steps worked together coherently.
And several others from the technical staff who had been called in for this strategic discussion — the shift supervisors, the senior technicians, the process engineers who made the day-to-day decisions that kept production running.
Karan took the seat at the head of the table. Aditya sat beside him, pulled out his notebook, and prepared to take notes.
"Let's talk about three microns," Karan said.
The room shifted. Not dramatically — just the small adjustnts of posture that happen when a topic that's been discussed privately for weeks is suddenly on the table officially.
Sato spoke first.
"Three microns is achievable," he said. His English was precise, each word carefully chosen. "But it is not the sa as four microns with smaller features. It is a different process regi with different failure modes." He gestured at Ravi Shankar, who pulled a diagram from his stack and slid it across the table.
It showed a cross-section view of a transistor: the silicon substrate, the thin gate oxide layer, the polysilicon gate electrode, the source and drain regions doped into the silicon.
"At four microns," Sato continued, pointing at the diagram, "the gate length is approximately four microns. The gate oxide thickness is roughly 60 nanoters. The aspect ratios are comfortable — the oxide is thin relative to the gate length, but not so thin that we encounter severe tunneling effects or breakdown."
He pulled the diagram back and sketched a new version on the whiteboard with quick, practiced strokes.
"At three microns, the gate length shrinks to three microns. But the oxide cannot scale proportionally — if we make it too thin, we get quantum chanical tunneling where electrons pass through the oxide barrier even when they should not. So we compromise: gate oxide goes to approximately 45 nanoters. Now the aspect ratios are tighter. The electric fields are stronger. The sensitivity to process variation increases."
---
What Sato is describing is one of the fundantal challenges of semiconductor scaling. Transistors work by using an electric field from the gate electrode to control the flow of current between source and drain. As transistors get smaller, maintaining that control becos harder. The gate oxide — a thin layer of silicon dioxide that insulates the gate from the channel — must be thin enough that the gate's electric field can penetrate it and influence the channel, but thick enough that current doesn't leak through it. This is a balancing act that gets more difficult as dinsions shrink.
At 4 microns, the tolerances are forgiving. At 3 microns, they tighten. By the ti the industry reaches 1 micron in the 1980s and below, this oxide scaling becos one of the primary limiters of Moore's Law. In 1973, moving from 4 to 3 microns is pushing into territory where these effects start to matter.
---
Rash picked up the thread. "The process tolerance budget shrinks by approximately thirty percent when we move from four microns to three microns. That ans lithography alignnt errors, diffusion depth variations, etching uniformity — everything that was acceptable at four microns becos marginal at three microns."
Suresh Iyer spoke up. "Currently our ion implantation dose control is ±8% across a wafer. At four microns, that's fine. At three microns, we need ±5% or better, which ans recalibrating the implanter and probably upgrading the beam current monitoring system."
Vikram leaned forward. "But we can do it. The equipnt is capable if we push it. The GCA 4800 stepper has a theoretical resolution limit of 2.5 microns — we are not at the equipnt limit yet. We are at the process control limit."
"Which is the harder limit to move," Sato said quietly.
Vikram looked at him. "With respect, Sato-san, we have been running four microns for six months. We have learned the process. Three microns is an incrental step, not a revolution."
"It is incrental in dinsion," Sato said. "It is not incrental in difficulty."
Tanaka spoke for the first ti. "The photoresist behavior at three microns is not the sa as at four microns." His voice was calm, factual. "The current resist formulation — AZ1350J — works at four microns because the exposure dose latitude is sufficient. At three microns, the depth of focus shrinks, the exposure dose window narrows, and the standing wave effects from reflection at the resist-substrate interface beco visible as line width variation."
He opened his notebook, showed a page of molecular diagrams. "I have been working on a modified resist formulation — higher contrast, lower outgassing, better adhesion to oxide. It is not ready for production. It is in characterization. We need another three months minimum before it is stable enough for manufacturing."
"Three months puts us at April," Karan said.
"Yes," Tanaka confird.
"And if we run the current resist at three microns?" Karan asked.
"Yields will be poor," Tanaka said. "Twenty to thirty percent. Maybe worse."
"Unacceptable for civilian production," Rash said. "We cannot compete in the market at thirty percent yield. The cost per functional chip is too high even if our semiconductors are best in world."
Lev, who had been listening quietly, finally spoke. "So the question is not whether we can do three microns. The question is whether we can do three microns at a yield that makes comrcial sense, and how long that takes."
"Exactly," Karan said.
He looked at the group. "Let refra the situation. ISMC has been running defense production for eighteen months. We produce chips for the S-27 Pinaka flight control computer, for the Kaveri FADEC system, and for the Netra-1 radar signal processor. These are small-volu, high-value applications where a thirty percent yield is acceptable because we only need a few hundred chips per year and the cost is not the primary constraint."
He paused.
"Now we want to enter civilian computing. The market is different. Universities need computing power for research. ISRO and BARC need computation for simulation. Banks are beginning to computerize. Large businesses need data processing. These custors need computers that are cheaper than imports, which ans the chips inside them must be produced at comrcially viable yields."
"The civilian market is also larger," Rash said. "Defense applications are hundreds of chips per year. Civilian applications could be thousands, then tens of thousands if we succeed."
"Which changes the economics entirely," Mohan Krishnan added. "At high volu, even small yield improvents translate to significant cost reductions."
Karan nodded. "So here is the decision we need to make. Do we start civilian production now with four-micron chips, or do we wait and start with three-micron chips?"
Arvind Desai, who had been quiet until now, spoke up. "What do civilian computers actually need? I an in terms of processing power and chip complexity. Because if four-micron chips are sufficient for the applications we are targeting, then waiting for three-micron just to have better specifications does not make sense. We should serve the market that exists, not the market we imagine."
Lev smiled slightly behind his mask — the kind of smile that ant soone had asked the correct question.
"That," he said, "is the strategic question."
Karan stood and walked to the whiteboard. He picked up a marker and drew a simple table.
Application | Current Solution | Chip Requirents
"Let's map this properly," he said. "What are we actually trying to enable?"
Rash pulled a folder from the stack of docunts at the end of the table and opened it. "I have been working on this for the past month. Market assessnt for Indian civilian computing."
He read from the summary page.
"Universities — IITs, IISc, major research universities — currently share computing ti on a small number of mainfra systems, mostly imported IBM or Soviet machines. The waiting ti for computing access is asured in days to weeks. Researchers need computational capability for engineering simulation, scientific calculation, and data analysis. They do not need the absolute fastest processor. They need reliable computation at reasonable cost with enough performance for research workloads."
"Estimated market size?" Karan asked.
"Eight to twelve institutions imdiately, expanding to twenty to thirty within three years if we can deliver systems that work," Rash said.
"Next category," Karan said.
"Governnt research institutions — ISRO, BARC, DRDO, and others. Similar needs to universities but with more specialized requirents. ISRO needs computation for orbital chanics and satellite data processing. BARC needs it for reactor simulation and nuclear calculations. DRDO needs it for weapons system modeling. These are current defense custors buying defense-grade systems, so they are already served by ISMC production. The opportunity here is to offer civilian-grade computing at lower cost for less critical applications — office computing, data managent, general scientific work."
"Third category?"
"Financial institutions," Suresh Iyer said, reading from a different section of the assessnt. "Banks are beginning to computerize transaction processing, account managent, and back-office operations. Currently they use manual ledgers or chanical calculators. The computing requirents are not complex — basic arithtic, data storage, printing. But the volu is high and the reliability requirent is absolute. A bank cannot tolerate a computer that crashes during transaction processing."
"Current solutions?" Karan asked.
"Imports, mostly," Iyer said. "Small British or Arican minicomputers. Expensive. Limited local support. Long lead tis for delivery."
"Market size?"
Governnt Bank of India's alone has over 2,000 branches. If even ten percent of branches get computing capability in the next five years, that is 200 installations. Add private banks, insurance companies, and large financial firms — the total market could be 400 to 600 systems."
Karan wrote numbers on the whiteboard. "And the computing power required for a bank branch computer is?"
Vikram answered this one. He had clearly been thinking about it. "Basic integer arithtic, data storage, simple input-output. We are not talking about floating-point computation or complex algorithms. A processor running at 2 to 4 MHz with 16 to 32 kilobytes of mory is sufficient. The Shergill-8 architecture we have been developing hits that specification easily with four-micron chips."
---
The Shergill-8 — a na ntioned casually here but representing months of design work — is ISMC's first comrcial microprocessor design. It is an 8-bit processor, aning it processes data in 8-bit chunks, with a simple instruction set designed for business data processing rather than scientific computation. In architecture it resembles the Intel 8008 (released 1972, historically) but with modifications for easier manufacturing on ISMC's process and better suited to Indian software developnt practices.
*At 4 microns, the Shergill-8 die size is approximately 4mm × 4mm, small enough to fit roughly 250 die per 4-inch wafer. At 62% yield, that is 155 functional processors per wafer. At current production costs, each processor costs approximately ₹400 to produce. A complete computer system with processor, mory, input-output, and peripherals can be built and sold for ₹15,000 to ₹20,000 — expensive for an individual but affordable for a university departnt or bank branch, and significantly cheaper than a ₹50,000 to ₹80,000 imported system.*
---
"So for universities and banks," Karan said, "four-micron chips are sufficient."
"Yes," Vikram confird.
"Then why are we discussing three microns?" Sato asked. It was not rhetorical — it was a genuine question.
Karan turned from the whiteboard.
"Because sufficient for today is not sufficient for five years from now," he said. "If we start civilian production with four-micron chips, we will serve the imdiate market. But that market will grow and its requirents will grow with it. Universities will want more powerful computers for more complex simulation. Banks will want faster transaction processing as volu increases. Governnt institutions will want better performance."
"If we are still at four microns in 1976, we will be behind the curve. Intel is moving. Motorola is moving. Japanese companies are moving. The world does not stand still waiting for us to catch up."
He paused.
"So the question is not whether we need three microns. The question is when we need it and how we get there without killing the business we are trying to build."
Lev nodded slowly. "A phased approach."
"Exactly," Karan said.
He walked back to the whiteboard and drew a tiline.
Q1 1973 (Now): Start 4-micron civilian production
- Target: Universities, research institutions, initial bank deploynts
- Production: Shergill-8 processor, support chips
- Volu: 500-800 chips/month initially, ramping to 2,000/month by Q4
Q2 1973 (April-June): 3-micron process developnt
- Parallel line, experintal production
- Tanaka's new photoresist formulation ready April
- Sato's lithography optimization ongoing
- Target yield: 50% by end of Q2
Q3 1973 (July-September): 3-micron pilot production
- First 3-micron Shergill-8 chips
- Validation, reliability testing
- Design new products that leverage 3-micron capability
Q4 1973 (October-December): 3-micron comrcial production
- Transition civilian line to 3-micron
- Maintain 4-micron line for defense applications and legacy products
- Launch next-generation computing products
"This gives us," Karan said, "market entry imdiately with proven technology, and technology advancent in parallel without risking the business on unproven process."
Rash studied the tiline. "It requires running two processes simultaneously. Two sets of photomasks, two sets of process recipes, two quality control protocols. That is significant overhead."
"Can the facility handle it?" Karan asked.
"Yes," Rash said after a mont. "The lithography area is currently running at about sixty percent capacity. We can dedicate one stepper to three-micron developnt without impacting four-micron production. The diffusion and implant areas have enough capacity. The constraint will be engineering ti — we need people working on both processes, and there is not infinite talent."
"We hire," Karan said simply.
"From where?" Deepak Narayan asked. "We have been recruiting from IITs and trying to convince people to return from the US. The talent pool is not infinite."
"Then we make it larger," Karan said. "We start a training program. We take fresh engineering graduates — not just from IITs, from good regional engineering colleges — and we train them specifically for semiconductor manufacturing. Six months of intensive training in clean room procedures, process engineering, and device physics. The experienced engineers here beco teachers as well as practitioners."
Ravi Shankar looked up. "Like an apprenticeship program?"
"Exactly like an apprenticeship program," Karan said. "The experienced engineers — Rash, Suresh, Mohan, Lev, Sato, Tanaka, Deepak, Vikram — each take two apprentices. Sixteen new engineers in the first batch, starting March. By September they are productive contributors. By 1974 they are training the next batch."
Sato considered this. "It is a different model from what I have seen. In Japan, companies hire from universities and train for years before giving significant responsibility. This is faster."
"We do not have years," Karan said. "We have to build the industry and train the workforce simultaneously."
Tanaka spoke quietly. "It will work if the teaching is serious. If the apprentices are treated as cheap labor, it will fail."
"Agreed," Karan said. "Which is why the experienced engineers get a teaching bonus on top of their salary. You are being paid to build the process and to build the people who will run it."
Rash made a note. "I will draft the program structure."
Vikram had been listening to all of this with visible impatience. Now he spoke.
"Can we talk about what three microns actually enables?" he said. "Because we have been focused on yield and process and training, but we have not talked about what we can build with three-micron chips that we cannot build with four-micron chips."
"Good," Karan said. "What can we build?"
Vikram pulled a schematic from his folder and unfolded it on the table. It showed a processor architecture — more complex than the Shergill-8, with additional functional units, more registers, a wider data path.
"This is the Shergill-16," he said. "A sixteen-bit processor. Approximately twice the computational capability of the Shergill-8. Better for scientific computing, engineering simulation, complex data processing. The Shergill-8 is sufficient for business data processing. The Shergill-16 is what universities and research institutions actually want for technical computing."
He pointed at the die size estimate in the corner of the schematic. "At four microns, the Shergill-16 die size is approximately eight milliters by eight milliters. That is too large — we only get about sixty to seventy die per wafer. At sixty-two percent yield, that is forty to forty-five functional chips per wafer. The economics are marginal."
"At three microns," Arvind Desai said, picking up the explanation, "the sa design shrinks to approximately six milliters by six milliters. Now we get about one hundred and thirty die per wafer. At even fifty percent yield — lower than our current four-micron yield — we get sixty-five functional chips per wafer. The economics work."
Lev looked at the schematic with the expression of soone evaluating a system for weaknesses. "What is the target clock frequency?"
"Four to six gahertz," Vikram said.
"And the target applications?"
"University engineering departnts for finite elent analysis, computational fluid dynamics, structural simulation," Vikram said. "ISRO for orbital chanics and satellite data processing. Private engineering firms for CAD applications when we get to that stage."
"It is ambitious," Lev said. It was not quite approval and not quite skepticism — more an acknowledgnt of scale.
"It needs to be," Vikram said. "If we only build what is safe, we will always be behind."
Sato spoke. "Ambition without discipline is failure at higher cost."
Vikram turned to him. "And discipline without ambition is irrelevance."
The room was quiet for a mont.
Karan let it sit. This was useful tension — the pull between the experienced engineers who had seen processes fail in expensive ways and the young engineers who were impatient to prove what India could do. Both perspectives had value. The art was keeping them in productive balance rather than destructive conflict.
"Here is what we will do," Karan said finally.
"The four-micron production line starts civilian manufacturing in February. Rash, you own the production ramp. Target eight hundred Shergill-8 processors per month by May, two thousand per month by September. That is the revenue line that funds everything else."
Rash nodded.
"The three-micron developnt line starts now. Sato, Tanaka, you own the process developnt. Photoresist formulation ready by April. Lithography optimization ongoing. Target fifty percent yield by end of Q2. You have full access to equipnt ti during off-shift hours and dedicated wafer allocation."
Sato and Tanaka both nodded.
"Vikram, Arvind, you work with Sato and Tanaka on the three-micron process but your primary job is getting the Shergill-16 design ready for three-micron production. I want the design finished, simulated, and validated by June. When the process is ready, the product is ready."
"Understood," Vikram said.
"Suresh, you work across both lines. Ion implantation process improvent is critical for both four-micron yield improvent and three-micron developnt. You also help Rash with production troubleshooting."
"Understood," Suresh said.
"Deepak, you are integration lead. You make sure the three-micron process steps work together as a complete flow. Ravi, you work with Sato on lithography optimization. Kumar, you support Tanaka on photoresist developnt and characterization."
Each man nodded as his assignnt was stated.
"Lev, you are thinking about what cos after the Shergill-16. We need a product roadmap for the next three years. What do we build in 1974? What do we build in 1975? What capabilities do we need to develop that we do not have yet?"
Lev nodded once. "I will work on it."
Karan turned to Aditya. "The apprenticeship program starts March first. Sixteen positions, recruited from the top regional engineering colleges. Housing, salary, and training stipend. We announce it next week."
Aditya made a note.
"One more thing," Karan said. He looked at the entire group. "We are not the only people doing this work. Intel exists. Motorola exists. Texas Instrunts exists. Japanese companies are moving fast. We have an advantage because we are building for Indian requirents and can optimize for our market. But we do not have the advantage of isolation. Other people are solving the sa problems we are solving,we are ahead but not by much."
"Which ans," he continued, "we have to be disciplined about what we choose to do and what we choose not to do. We are not trying to build the fastest processor in the world. We are trying to build the right processors for Indian computing needs, at a cost and capability that makes imports unnecessary. That is a different optimization problem."
"Understood," Rash said.
The eting was winding down. Karan had one more point.
"When we need to expand production capacity — and we will need to expand if this succeeds — where does that expansion happen?"
The room waited. This was clearly sothing Karan had been thinking about.
"Right here," he said. "In Gorakhpur. We build the second fabrication line three kiloters from this one. A third line after that if demand requires it. We do not scatter semiconductor manufacturing across India. We concentrate it here, where the industrial ecosystem already exists, where the technical talent is being trained, where the support infrastructure is established."
He gestured vaguely in the direction of the rest of the Gorakhpur industrial complex beyond the walls.
"Shergill Steel provides the materials. Shergill Agri-Chem provides the high-purity chemicals. The precision machining facilities provide the custom tooling. The power infrastructure is already here because we built it. The housing for technical workers is here. The erging technical education system is here."
"When soone thinks of Indian semiconductor manufacturing, they should think of Gorakhpur. Not Bombay. Not Madras. Gorakhpur. This becos the center — the place where the most advanced work happens, where the R&D is done, where the next generation of process technology is developed."
"We may build regional facilities later for specific purposes — a packaging and test facility closer to custors, an assembly plant near a port for export. But the core capability, the cutting edge, the headquarters — that stays here. Always."
The room absorbed this. It was a statent of intent that went beyond quarterly tilines and process yields. It was a vision of what Gorakhpur could beco — not just a city in Uttar Pradesh but a na that ant sothing globally.
Rash spoke. "It will require significant infrastructure investnt. Power, water, clean room construction, equipnt procurent, housing for the expanding workforce."
"Yes," Karan said. "Which is why we start planning now. Lev, add that to your roadmap. I want to see a facility plan for the second fab — size, capacity, tiline, capital requirents — by March."
"Understood," Lev said.
---
The eting was over.
People gathered their notes, stood, began moving toward the door. Sato and Tanaka stayed for a mont, discussing sothing in quiet Japanese — probably photoresist chemistry, given the hand gestures indicating molecular structures. Vikram and Arvind were already arguing about so detail of the Shergill-16 design as they walked out. The technicians and process engineers filed out in smaller groups, conversations fragnting into the specific technical problems each would tackle this week.
Lev caught Karan at the door.
"The phased approach is correct," he said quietly. "Four-micron production for revenue, three-micron developnt for future capability. It manages risk."
"But?" Karan said, because there was clearly a but coming.
"But it assus the market develops as we expect," Lev said. "If demand for computing is lower than projected, we will be building capability without custors. If demand is higher, we will not be able to scale fast enough."
"Which is the better problem to have?" Karan asked.
"Higher demand," Lev said imdiately. "You can always build more capacity if custors are waiting. You cannot build custors if capacity is sitting idle."
"Then we should plan for higher demand," Karan said.
"Yes," Lev said. "Which is why the second fabrication line planning is important. Not building it yet. But planning it. Because if this succeeds, we will need more capacity than this facility can provide."
"How much more?"
"Five to ten tis current capacity within three to four years," Lev said. "Which ans multiple clean rooms, significantly more equipnt, and a workforce that grows from sixty-eight people to three hundred or more."
"All in Gorakhpur," Karan said.
"All in Gorakhpur," Lev confird. "It is the right strategy. Concentration gives you advantages that distribution does not — shared infrastructure, knowledge transfer, faster problem-solving because the experts are in the sa location."
He paused.
"I have seen the opposite in the US — semiconductor companies scattered across California, each solving similar problems independently. It works, but it is not optimal. What you are building here is an integrated ecosystem. That is more powerful."
"Good," Karan said. "Then we stay focused on building it correctly."
---
Karan and Aditya walked back through the gowning room, removing the clean room suits and erging into the normal industrial environnt of the Gorakhpur complex.
Outside, the January air was cool and dry. The sun was high now, late morning, and the facility grounds were busy with the normal activity of a manufacturing complex — trucks delivering materials, workers moving between buildings, the distant sound of talworking from the precision machining facility.
Aditya was quiet for a mont, processing.
Then: "The apprenticeship program. Sixteen people in March. That is a significant commitnt."
"It is the only way to scale," Karan said. "We cannot hire enough experienced people. There are not enough experienced people in India. So we create them."
"And if they leave after we train them?" Aditya asked. "If they take the training and go to work for soone else, or go back to the US where salaries are higher?"
"So will," Karan said. "That is inevitable. But most will stay if the work is aningful and the opportunity is real. People do not leave good problems for higher pay. They leave bad situations for anything better."
He paused.
"What we are building here is not just a semiconductor facility. It is proof that India can compete in advanced technology. That we are not condemned to be importers and assemblers. That Indian engineers can do this work as well as anyone."
"The people who understand that do not leave for a salary increase. They stay because the mission matters."
Aditya made a note. "I will draft the announcent for the apprenticeship program."
They walked in silence for a mont.
"Bhaiyya," Aditya said. "The tiline you laid out. Four-micron production in February, three-micron by Q4. That is aggressive."
"It is necessary," Karan said. "We are not operating in isolation. Intel will move. Motorola will move. If we are still at four microns in 1975 while the rest of the world is at two microns, we have lost."
"But we are ahead of where India would have been without this," Aditya said.
"Being ahead of where we would have been is not the sa as being where we need to be," Karan said.
He looked at the ISMC building behind them — a nondescript industrial structure that from the outside gave no indication of the precision happening inside.
"In 1971 we had nothing," he said. "No semiconductor fabrication capability, no expertise, complete dependence on imports for any electronics more sophisticated than a radio. In two years we have built a four-micron fabrication line producing chips for defense systems and preparing to serve civilian computing."
"That is extraordinary progress. But it is not enough. It will never be enough until India has complete sovereignty in this technology — until we can design and manufacture any chip we need, at any level of complexity, without depending on anyone."
"That is the goal?" Aditya asked.
"That is the goal," Karan confird.
He paused, looking back at the facility.
"And Gorakhpur is where that happens. Not scattered across ten cities. Here. Where we can build the ecosystem completely — the fabrication, the design, the materials, the equipnt, the talent. Where everything connects and reinforces everything else."
"When people think about where India's technology revolution happened," he continued, "they will not think about so anonymous industrial park. They will think about Gorakhpur. They will know that this is where it started and where it continues."
Aditya considered this. "That is a different vision from most industrial developnt. Most companies scatter operations to reduce risk or chase local advantages."
"Most companies are not trying to build an industry from zero," Karan said. "We are. Which ans we need concentration, not distribution. We need everyone solving problems in the sa location where solutions can spread imdiately."
"Five years from now," he said, "when a young engineer in Madras or Bombay wants to work on the most advanced semiconductor technology in India, he will not look for jobs in multiple cities. He will co here. To Gorakhpur. Because this is where the work is."
---
They reached the car. The driver opened the door. Karan paused before getting in, looking back at the facility one more ti.
Inside that building, at this mont, a lithography stepper was exposing a photoresist-coated silicon wafer with ultraviolet light, creating circuit patterns asured in microns. Tanaka was probably in the chemical lab, testing a new photoresist formulation, adjusting polyr ratios and exposure paraters. Sato was at the optical bench, aligning the stepper's lens system to tolerances asured in fractions of a wavelength. Rash was reviewing production schedules. Suresh Iyer was at the ion implanter, fine-tuning the beam current. Vikram and Arvind were at their workstations, simulating the Shergill-16 processor, running timing analysis, checking signal integrity.
Sixty-eight people across three shifts, fifteen thousand square feet of clean room space, working at the edge of what India had never done before.
It was not dramatic. It was not loud. It was ticulous, patient, technical work where success was asured in yield percentages and process control limits and the slow accumulation of knowledge about how to make things that were very small and very precise.
But it mattered.
In five years, Indian universities would be running computations on processors designed and manufactured in Gorakhpur. Indian banks would be processing transactions on computers built in Gorakhpur. Indian research institutions would be simulating nuclear reactors and satellite trajectories on chips made in Gorakhpur.
The dependency that had existed since independence — the assumption that advanced technology ca from elsewhere and India's role was to import and operate it — would be breaking.
Not completely. Not yet. There were still many technologies India did not have and would need to develop or acquire. But in this one domain, the trajectory was clear.
And it was all happening here.
In Gorakhpur.
Not because geography demanded it. Because Karan had decided it would be so, and had built the ecosystem to make it possible.
Karan got into the car.
"Back to the main office," he said to the driver.
As they pulled away, Aditya was already writing in his notebook — notes for the apprenticeship program announcent, tiline confirmations, action items from the eting.
Karan looked out the window at the passing industrial landscape of the complex.
In his mind, he was already thinking about the second fabrication line. About the infrastructure that would need to expand to support three hundred workers instead of sixty-eight. About the housing and schools and technical training institutes that would need to grow alongside the industrial capacity.
About what Gorakhpur would look like in 1975, in 1980, in 1985.
Because the goal was not to reach a destination.
The goal was to build sothing that kept growing, that kept advancing, that made standing still impossible.
The car turned onto the main road.
Behind them, the ISMC facility continued its work, quiet and precise, building India's semiconductor future one silicon wafer at a ti.
In Gorakhpur.
Where it would always be.
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